This invention relates to microelectronic manufacturing methods and devices, and more particularly to silicon ingot manufacturing methods and silicon ingots and wafers manufactured thereby.
Integrated circuits are widely used in consumer and commercial applications. Integrated circuits are generally fabricated from monocrystalline silicon. As the integration density of integrated circuits continues to increase, it generally is of increasing importance to provide high-quality monocrystalline semiconductor material for integrated circuits. Integrated circuits are typically produced by fabricating a large ingot of monocrystalline silicon, slicing the ingot into wafers, performing numerous microelectronic fabrication processes on the wafers and then dicing the wafers into individual integrated circuits that are packaged. Because the purity and crystallinity of the silicon ingot can have a large impact on the performance of the ultimate integrated circuit devices that are fabricated therefrom, increased efforts have been made to fabricate ingots and wafers with reduced numbers of defects.
Conventional methods of manufacturing monocrystalline silicon ingots will now be described. An overview of these methods is provided in Chapter 1of the textbook xe2x80x9cSilicon Processing for the VLSI Era, Volume 1, Process Technologyxe2x80x9d, by Wolf and Tauber, 1986, pp. 1-35, the disclosure of which is hereby incorporated herein by reference. In manufacturing monocrystalline silicon, electronic grade polysilicon is converted into a monocrystalline silicon ingot. Polycrystalline silicon such as quartzite is refined to produce electronic grade polycrystalline silicon. The refined electronic grade polycrystalline silicon is then grown into a single crystal ingot using the Czochralski (CZ) or Float Zone (FZ) technique. Since the present invention relates to manufacturing a silicon ingot using the CZ technique, this technique will now be described.
Czochralski growth involves crystalline solidification of atoms from a liquid phase at an interface. In particular, a crucible is loaded with a charge of electronic grade Polycrystalline silicon and the charge is melted. A seed crystal of silicon of precise orientation tolerance is lowered into the silicon melt. The seed crystal is then withdrawn at a controlled rate in the axial direction. Both the seed crystal and the crucible are generally rotated during the pulling process, in opposite directions.
The initial pull rate is generally relatively rapid so that a thin neck of silicon is produced. Then, the melt temperature is reduced and stabilized so that the desired ingot diameter can be formed. This diameter is generally maintained by controlling the pull rate. The pulling continues until the melt is nearly exhausted, at which time a tail is formed.
FIG. 1 is schematic diagram of a Czochralski puller. As shown in FIG. 1, the Czochralski puller 100 includes a furnace, a crystal pulling mechanism, an environment controller and a computer-based control system. The Czochralski furnace is generally referred to as a hot zone furnace. The hot zone furnace includes a heater 104, a crucible 106 which may be made of quartz, a succeptor 108 which may be made of graphite and a rotation shaft 110 that rotates about an axis in a first direction 112 as shown.
A cooling jacket or port 132 is cooled by external cooling means such as water cooling. A heat shield 114 may provide additional thermal distribution. A heat pack 102 is filled with heat absorbing material 116 to provide additional thermal distribution.
The crystal pulling mechanism includes a crystal pulling shaft 120 which may rotate about the axis in a direction 122 opposite the direction 112 as shown. The crystal pulling shaft 120 includes a seed holder 120a at the end thereof. The seed holder 120a holds a seed crystal 124, which is pulled from the melt 126 in the crucible 106 to form an ingot 128.
The ambient control system may include the chamber enclosure 140, the cooling jacket 132 and other flow controllers and vacuum exhaust systems that are not shown. A computer-based control system may be used to control the heating elements, puller and other electrical and mechanical elements.
In order to grow a monocrystalline silicon ingot, the seed crystal 124 is contacted to the silicon melt 126 and is gradually pulled in the axial direction (up). Cooling and solidification of the silicon melt 126 into monocrystalline silicon occurs at the interface 130 between the ingot 128 and the melt 126. As shown in FIG. 1, the interface 130 is concave relative to melt 126.
Real silicon ingots differ from ideal monocrystalline ingots because they include imperfections or defects. These defects are undesirable in fabricating integrated circuit devices. These defects may be generally classified as point defects or agglomerates (three-dimensional defects). Point defects are of two general types: vacancy point defects and interstitial point defects. In a vacancy point defect, a silicon atom is missing from one of its normal positions in the silicon crystal lattice. This vacancy gives rise to a vacancy point defect. On the other hand, if an atom is found at a non-lattice site (interstitial site) in the silicon crystal, it gives rise to an interstitial point defect.
Point defects are generally formed at the interface 130 between the silicon melt 126 and the solid silicon 128. However, as the ingot 128 continues to be pulled, the portion that was at the interface begins to cool. During cooling, diffusion of vacancy point defects and interstitial point defects may cause defects to coalesce and form vacancy agglomerates or interstitial agglomerates. Agglomerates are three-dimensional (large) structures that arise due to coalescence of point defects. Interstitial agglomerates are also referred to as dislocation defects of D-defects. Agglomerates are also sometimes named by the technique that is used to detect these defects. Thus, vacancy agglomerates are sometimes referred to as Crystal-Originated Particles (COP), Laser Scattering Tomography (LST) defects or Flow Pattern Defects (FPD). Interstitial agglomerates are also known as Large Dislocation (L/D) agglomerates. A discussion of defects in monocrystalline silicon is provided in Chapter 2 of the above-mentioned textbook by Wolf and Tauber, the disclosure of which is hereby incorporated herein by reference.
It is known that many parameters may need to be controlled in order to grow a high purity ingot having low numbers of defects. For example, it is known to control the pull rate of the seed crystal and the temperature gradients in the hot zone structure. Voronkov""s Theory found that the ratio of V to G (referred to as V/G) can determine the point defect concentration in the ingot, where V is the pull rate of the ingot and G is the temperature gradient of the ingot-melt interface. Voronkov""s Theory is described in detail in xe2x80x9cThe Mechanism of Swirl Defects Formation in Siliconxe2x80x9d by Voronkov, Journal of Crystal Growth, Vol. 59, 1982, pp. 625-643.
An application of Voronkov""s Theory may be found in a publication by the present inventor et al. entitled xe2x80x9cEffect of Crystal Defects on Device Characteristicsxe2x80x9d, Proceedings of the Second International Symposium on Advanced Science and Technology of Silicon Material, Nov. 25-29, 1996, p. 519. At FIG. 15, reproduced herein as FIG. 2, a graphical illustration of vacancy and interstitial concentrations, as a function of V/G, is shown. Voronkov""s Theory shows that the generation of a vacancy/interstitial mixture in a wafer is determined by V/G. More particularly, for V/G ratios below a critical ratio, an interstitial rich ingot is formed, while for V/G ratios above the critical ratio, a vacancy rich ingot is formed.
Notwithstanding many theoretical investigations by physicists, material scientists and others, and many practical investigations by Czochralski puller manufacturers, there continues to be a need to reduce the defect density in monocrystalline silicon wafers. The ultimate need is for pure silicon wafers that are free of vacancy and interstitial agglomerates.
The present invention provides methods for modifying Czochralski pullers and Czochralski pullers so modified, to grow perfect monocrystalline silicon ingots that are free of vacancy agglomerates and interstitial agglomerates, by modifying components of the Czochralski puller to produce a temperature gradient at the ingot-melt interface that is greater than about 2.5 degrees Kelvin per millimeter at the ingot axis and is also at least about equal to the temperature gradient at a diffusion length from the cylindrical edge of the ingot. By producing a temperature gradient at the ingot-melt interface that is greater than about 2.5 degrees Kelvin per millimeter at the ingot axis and that is also at least about equal to the temperature gradient at a diffusion length from the diffusion edge, an ingot-melt interface that is planar or is convex relative to the silicon melt may be produced. The ingot so pulled is sliced into a plurality of pure silicon wafers that may include point defects but that are free of vacancy agglomerates and interstitial agglomerates.
Czochralski pullers according to the present invention include an enclosure and a crucible in the enclosure that holds a silicon melt. A seed holder is provided in the enclosure, adjacent the crucible. A heater is provided in the enclosure, surrounding the crucible. A heat pack is provided in the enclosure, surrounding the heater. A heat shield is provided between the crucible and the seed holder and a cooling jacket is provided between the heat shield and the seed holder. Means are provided for pulling the seed holder away from the crucible to thereby pull a monocrystalline silicon ingot from the silicon melt. The monocrystalline silicon ingot has an axis and a cylindrical edge. The silicon melt and the ingot define an ingot-melt interface therebetween.
According to the invention, at least one of the position of the heat shield, the configuration of the heat shield, the position of the heater, the configuration of the cooling jacket, the position of the crucible, the configuration of the heat pack and the power that is applied to the heater are selected to produce a temperature gradient at the ingot-melt interface that is greater than about 2.5 degrees Kelvin per millimeter at the axis and that is also at least about equal to the temperature gradient at a diffusion length from the cylindrical edge of the ingot. According to another aspect of the invention, at least one of the position of the heat shield, the configuration of the heat shield, the position of the heater, the configuration of the cooling jacket, the position of the crucible, the configuration of the heat pack and the power that is applied to the heater are selected to produce an ingot-melt interface that is planar or is convex relative to the silicon melt.
Each of the above described parameters may be varied separately. For example, the crucible includes a crucible top and a crucible bottom and the heat shield includes a heat shield top and a heat shield bottom. The position of the heat shield preferably is selected by varying the distance between the heat shield bottom and the crucible top.
The configuration of the heat shield may be selected by providing a heat shield cover at the heat shield bottom. The heat shield cover preferably comprises ring-shaped heat shield housing within the crucible, including inner and outer heat shield housing walls, an oblique heat shield housing floor and a heat shield housing roof that extend between the inner and outer heat shield housing walls. The heat shield housing preferably contains insulating material therein. The oblique heat shield housing defines an angle from horizontal and the configuration of the heat shield preferably is also selected by varying this angle.
The heater also includes a heater top and a heater bottom, and the position of the heater preferably is selected by varying the distance between the crucible top and the heater top. The position of the heater and the position of the crucible also may be concurrently varied axially relative to the enclosure.
The cooling jacket also includes a cooling jacket top and a cooling jacket bottom and the position of the cooling jacket preferably is selected by varying the distance between the crucible top and the cooling jacket bottom. The heat pack includes an upper heat pack housing and a lower heat pack housing, each of which is filled with heat absorbing material. The configuration of the heat pack preferably is selected by removing at least some of the heat absorbing material from the upper heat pack housing.
The above described parameters are preferably varied together to produce a temperature gradient of the ingot-melt interface that is greater than about 2.5 degrees Kelvin per millimeter at the axis and that is also at least about equal to the temperature gradient at a diffusion length from the cylindrical edge of the ingot. More specifically, at least one of the position of the heat shield, the configuration of the heat shield and the position of the heater are selected to produce a temperature gradient at the ingot-melt interface at the axis that is at least about equal to the temperature gradient at a diffusion length from the cylindrical edge. Then, at least one of the configuration of the cooling jacket, the position of the crucible and the configuration of the heat pack are selected to produce a temperature gradient at the ingot-melt interface at the axis that is greater than about 2.5 degrees Kelvin per millimeter.
More preferably, the position of the heat shield, the configuration of the heat shield and the position of the heater are all selected to produce a temperature gradient at the ingot-melt interface at the axis that is greater than the temperature gradient at the cylindrical edge. Then, the configuration of the cooling jacket, the position of the crucible, the position of both the heater and the crucible and the configuration of the heat pack are all selected to produce a temperature gradient at the ingot-melt interface axis that is greater than about 2.5 degrees Kelvin per millimeter while maintaining the temperature gradient at the axis to be at least about equal to the temperature gradient at a diffusion length from the cylindrical edge. Perfect silicon wafers can thereby be formed in modified Czochralski pullers.